1/9 semiconductor technical data kmb7d0np30qa n and p-ch trench mosfet revision no : 3 general description switching regulator and dc-dc converter applications. it s mainly suitable for back-light inverter. features h n-channel : v dss =30v, i d =7a. : r ds(on) =23.5m ? (max.) @ v gs =10v : r ds(on) =39m ? (max.) @ v gs =4.5v h p-channel : v dss =-30v, i d =-5a. : r ds(on) =45.5m ? (max.) @ v gs =-10v : r ds(on) =80m ? (max.) @ v gs =-4.5v h super high dense cell design. h reliable and rugged. maximum rating (ta=25 ? ) g1 s1 d1 d1 g2 d2 d2 s2 n-channel mosfet p-channel mosfet characteristic symbol n-ch p-ch unit drain-source voltage v dss 30 -30 v gate-source voltage v gss ? 20 ? 20 v drain current dc i d * 7 -5 a pulsed (note1) i dp 29 -20 source-drain diode current i s 1.7 -1.7 a drain power dissipation p d * 2 w maximum junction temperature t j 150 ? storage temperature range t stg -55 q 150 ? thermal resistance, junction to ambient r thja * 62.5 ? /w 1 2 3 4 8 7 6 5 s 1 g 1 s 2 g 2 d 1 d 1 d 2 d 2 2011. 3. 18 flp-8 0.20+0.1/-0.05 p t 1.27 u 0.1 max millimeters 0.4 0.1 0.15+0.1/-0.05 4.85 0.2 b2 g h l d a b1 dim 6.02 0.3 1.63 0.2 0.65 0.2 3.94 0.2 + _ + _ + _ + _ + _ + _ g h b1 b2 1 4 5 8 a p d l t u pin connection (top view) note : *sorface mounted on fr4 board
2011. 3. 18 2/9 kmb7d0np30qa revision no : 3 electrical characteristics (ta=25 ? ) characteristic symbol test condition min. typ. max. unit static drain-source breakdown voltage bv dss i d =250 a, v gs =0v, n-ch 30 - - v i d =-250 a, v gs =0v, p-ch -30 - - drain cut-off current i dss v gs =0v, v ds =24v n-ch - - 1 a v gs =0v, v ds =-24v p-ch - - -1 gate leakage current i gss v gs = ? 20v, v ds =0v n-ch - - ? 100 na p-ch - - ? 100 gate threshold voltage v th v ds =v gs, i d =250 a n-ch 1.0 - 3 v v ds =v gs, i d =-250 a p-ch -1.0 - -3 drain-source on resistance r ds(on) * v gs =10v, i d =7a n-ch - 18 23.5 m ? v gs =-10v, i d =-5a p-ch - 35 45.5 v gs =4.5v, i d =6a n-ch - 30 39 v gs =-4.5v, i d =-4a p-ch - 62 80 on state drain current i d(on) * v gs =4.5v, v ds =5v n-ch 20 - - a v gs =-10v, v ds =-5v p-ch -20 - - forward transconductance g fs * v ds =5v, i d =6.6a n-ch - 10 - s v ds =-5v, i d =-5a p-ch - 9 - source-drain diode forward voltage v sd * i s =1.7a, v gs =0v n-ch - 0.7 1.2 v i s =-1.7a, v gs =0v p-ch - -0.8 -1.2
2011. 3. 18 3/9 kmb7d0np30qa revision no : 3 note 1>* pulse test : pulse width ? 300 k , duty cycle ? 2%. electrical characteristics (ta=25 ? ) characteristic symbol test condition min. typ. max. unit dynamic total gate charge q g n-ch : v ds =15v, i d =6.6a, v gs =10v (fig.1) p-ch : v ds =-15v, i d =-5a, v gs =-10v (fig.3) n-ch - 16.4 20.5 nc p-ch - 13 16 n-ch : v ds =15v, i d =6.6a, v gs =4.5v (fig.1) p-ch : v ds =-15v, i d =-5a, v gs =-4.5v (fig.3) n-ch - 7.2 9 p-ch - 6.25 7.8 gate-source charge q gs n-ch : v ds =15v, i d =6.6a, v gs =10v (fig.1) p-ch : v ds =-15v, i d =-5a, v gs =-10v (fig.3) n-ch - 4 - p-ch - 2.6 - gate-drain charge q gd n-ch - 2.6 - p-ch - 2.9 - turn-on delay time t d(on) n-ch : v dd =15v, i d =6.6a, v gs =10v, r g =3 ? (fig.2) p-ch : v dd =-15v, v gs =-10v, r g =3 ? , r l =2.7 ? (fig.4) n-ch - 7.4 - ns p-ch - 4.7 - turn-on rise time t r n-ch - 27.7 - p-ch - 7.8 - turn-off delay time t d(off) n-ch - 12.2 - p-ch - 47.2 - turn-off fall time t f n-ch - 7.6 - p-ch - 22.6 - input capacitance c iss n-ch : v ds =15v, v gs =0v, f=1.0mhz p-ch : v ds =-15v, v gs =0v, f=1.0mhz n-ch - 742 - pf p-ch - 820 - output capacitance c oss n-ch - 126 - p-ch - 137 - reverse transfer capacitance c rss n-ch - 76 - p-ch - 89 -
2011. 3. 18 4/9 kmb7d0np30qa revision no : 3 gate - source voltage v gs (v) fig1. i d - v ds drain - source voltage v ds (v) 0 0 12 16 8 4 20 0 10 15 5 20 25 16 5 3 24 0 1.6 4.8 3.2 0.8 2.4 4.0 fig2. i d - v gs fig3. v th - t j fig5. r ds(on) - t j -75 -50 -25 0.6 0.4 0.8 1.6 1.0 1.2 1.4 050 25 100 150 75 125 drain current i d (a) drain current i d (a) fig4. i dr - v sd 1 10.0 20.0 0.6 1.0 1.4 1.2 0.8 0.4 0 0 25 -25 50 -75 -50 100 150 125 75 v gs = 10, 9, 8, 7, 6, 5v 1.4 0.6 0.4 1.0 1.8 2.2 normalized threshold voltage v th (v) reverse drain current i dr (a) normalized on resistance junction temperature tj ( ) c source - drain voltage v sd (v) junction temperture t j ( ) c v gs = 3v v gs = 4v t j = 12 5 c v gs = 10v i d = 6.6a v ds = v gs i ds = 250 a fig6. c - v ds drain - source voltage v ds (v) capacitance (pf) 0 200 600 800 1000 1200 400 1600 1800 1400 020 10 525 15 30 c iss c oss c rss n-channel t j = 25 c t j = -55 c
2011. 3. 18 5/9 kmb7d0np30qa revision no : 3 gate - charge q g (nc) 0 12 10 6 2 4 8 614 212 10 81618 4 0 fig7. q g - v gs gate - source voltage v gs (v) v ds =15v i d = 6.6a square wave pulse duration (sec) 10 1 10 2 10 3 10 -3 10 -2 10 -1 10 0 10 -4 fig9. transient thermal response curve t 1 t 2 p dm 1. duty cycle, d = 2. per unit base = r ja = 62.5 c/w t 1 t 2 0.02 0.1 0.2 duty cycle = 0.5 0.05 drain current i d (a) drain - source voltage v ds (v) fig8. safe operation area 10 1 10 1 10 2 10 3 10 -1 10 -2 10 -1 10 0 10 0 10 2 v gs = 10v single pulse 1ms 10ms 10s 100ms 1s dc single pluse 10 -2 10 -1 10 0 normalized transient thermal resistance operation in this area is limited by r ds(on)
2011. 3. 18 6/9 kmb7d0np30qa revision no : 3 fig5. r ds(on) - t j normalized on resistance junction temperture t j ( ) c -75 -50 0.8 0.0 1.0 1.8 2.2 0.4 1.4 050100 -25 25 75 125 150 v gs = -10v i d = -5a drain - source voltage v ds (v) capacitance (pf) fig6. c - v ds -25 -10 -15 0 -5 -20 -30 0 200 600 1200 1000 800 400 c oss c iss c rss p-channel gate - source voltage v gs (v) fig1. i d - v ds drain - source voltage v ds (v) 0 0 -16 -20 -4 -12 -8 0 -5 -10 -20 -15 -25 -2 -5 -6 -4 -3 1 0-4.0-4.8 -2.4 -0.8 -1.6 -3.2 fig2. i d - v gs drain current i d (a) drain current i d (a) v gs = -10,-9,-8,-7,-6,-5v v gs = -4v tj= -55 c tj=125 c v gs = -3v tj=25 c fig4. i dr - v sd reverse drain current i dr (a) -1.0 -10 -20 -0.8 -1.4 -1.2 -0.6 -1.0 -0.4 source - drain voltage v sd (v) normalized threshold voltage v th fig3. v th - t j -75 -50 -25 0.6 0.8 0.4 1.6 1.0 1.4 1.2 050100 25 150 125 75 junction temperature tj ( ) c v ds = v gs i d = -250 a
2011. 3. 18 7/9 kmb7d0np30qa revision no : 3 gate - charge q g (nc) 0 -12 -10 -6 -2 -4 -8 14 8 612 010 24 fig7. q g - v gs gate - source voltage v gs (v) v d = -15v i d = -5a square wave pulse duration (sec) 10 1 10 2 10 3 10 -3 10 -2 10 -1 10 0 10 -4 fig9. transient thermal response curve t 1 t 2 p dm 1. duty cycle, d = 2. per unit base = r ja = 62.5 c/w t 1 t 2 0.02 0.1 0.2 duty cycle = 0.5 0.05 drain current i d (a) drain - source voltage v ds (v) fig8. safe operation area 10 1 10 1 10 2 10 3 10 -1 10 -2 10 -1 10 0 10 0 10 2 v gs = 10v single pulse 1ms 10ms 10s 100ms 1s dc single pluse 10 -2 10 -1 10 0 normalized transient thermal resistance operation in this area is limited by r ds(on)
2011. 3. 18 8/9 kmb7d0np30qa revision no : 3 fig. 1 gate charge v gs 10 v q g q gd q gs q v ds v gs t r t d(on) 10% 90% t on t f t d(off) t off i d i d fig. 2 resistive load switching v gs v ds v ds v gs 1.0 ma schottky diode 10 v 3 ? r l 0.5 v dss 0.5 v dss n-channel
2011. 3. 18 9/9 kmb7d0np30qa revision no : 3 fig. 1 gate charge v gs - 10 v q g q gd q gs q v ds v gs t r t d(on) 10% 90% t on t f t d(off) t off i d i d fig. 2 resistive load switching v gs v ds v ds v gs 1.0 ma schottky diode -10 v 3 ? r l 0.5 v dss 0.5 v dss p-channel
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